Semiconductor device and manufacturing method thereof

ABSTRACT

Protective tape  22  is bonded onto the rear surface of a semiconductor element  1  prior to the resin sealing step, and then only the primary surface of the semiconductor element  1  is sealed with a resin layer  5  so that cracks and warping which would otherwise be caused by an external force or foreign matter at the rear surface of the semiconductor element was exposed, are prevented to facilitate the surface polishing step and also so that a lower profile is achieved for the semiconductor device by not sealing the rear surface with resin.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a semiconductor device, and morespecifically, it relates to a resin-sealed semiconductor device and amanufacturing method thereof.

[0002] With mobile apparatuses such as notebook computers having come tobe used widely in recent years, resin-sealed semiconductor devicesmounted in such apparatuses need to achieve a lower profile, furtherminiaturization and reduced weight. Accordingly, numerous resin-sealedsemiconductor devices have been proposed in response to these technicalrequirements.

[0003]FIG. 4 illustrates an example of such a semiconductor device inthe prior art. Wiring 104 constituted of copper (Cu) are electricallyconnected to electrode pads 102 formed at the primary surface of asemiconductor element 100. Cu posts 106 having a height of approximately150 micrometer are connected with the wiring 104. Then, a resin layer108 is formed at a height corresponding to the height of the Cu posts106 for sealing. External connection terminals constituted of a metalsuch as solder balls 110 are formed at the tips of the Cu posts 106 thatare exposed.

[0004] The process up to this point is implemented on a wafer with aplurality of semiconductor elements 100 arrayed thereon. Then, the waferundergoes a dicing process to be divided into individual pieces. Theresulting semiconductor devices are so-called chip-size packagesemiconductor devices whose size is very close to the size of thesemiconductor elements.

[0005] During the process for manufacturing the device described above.,a wafer comprising a plurality of semiconductor elements 100 is set at amold die constituted of an upper die 112 and a lower die 114, asillustrated in FIG. 5, to achieve sealing with a resin so as tocompletely cover the Cu posts 106.

[0006] If foreign matter such as dirt is present inside the mold die atthis time, the foreign matter may come into contact with the rearsurfaces of the semiconductor elements 100 to scar them and even causecracks 116.

[0007] In addition, surface polishing is performed by using an abrasivematerial 118, as illustrated in FIG. 6 to expose the tips of the Cuposts 106 after the resin curing process.

[0008] During the polishing process, the wafer is vacuum held throughvacuum holes 122 formed at a polishing stage 120 to secure the wafer.However, if the wafer is warped, the vacuum hold may not be successful,which, in turn, may make it impossible to perform surface polishing.

[0009] Such warping of the wafer occurs due to the difference betweenthe coefficient of expansion of the wafer (the semiconductor element100) and the coefficient of expansion of the resin layer 108 sealedthereupon. Such warping occurs to varying degrees depending upon thethickness of the resin layer 5 and the type of material used toconstitute the resin layer 5.

[0010] In addition, semiconductor devices achieved by forming a sealingresin layer at the rear surfaces of the semiconductor elements as wellas at the primary surfaces have been proposed in recent years. However,there is a problem in that since the resin is injected at both surfaces,the total thickness of the resin layer increases.

SUMMARY OF THE INVENTION

[0011] By addressing the problems of the prior art discussed above,according to the present invention, the primary surface of asemiconductor element is sealed with a resin layer and protective tapeis bonded to its rear surface.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other features of the invention and the concomitantadvantages will be better understood and appreciated by persons skilledin the field to which the invention pertains in view of the followingdescription given in conjunction with the accompanying drawings whichillustrate preferred embodiments.

[0013]FIG. 1 is a sectional view of an embodiment of the presentinvention;

[0014]FIG. 2 illustrates the manufacturing method according to thepresent invention (part 1);

[0015]FIG. 3 illustrates the manufacturing method according to thepresent invention (part 2);

[0016]FIG. 4 is a sectional view of a structure adopted in the priorart;

[0017]FIG. 5 illustrates a resin sealing process implemented in theprior art; and

[0018]FIG. 6 illustrates a surface polishing process implemented in theprior art.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0019] The following is a detailed explanation of the semiconductordevice and the manufacturing method thereof in a preferred embodiment ofthe present invention given in reference to the attached drawings.

[0020]FIG. 1 is a sectional view of the semiconductor device in anembodiment of the present invention. The method that is employed tomanufacture this semiconductor device is explained. First, electrodepads 12 are formed at the primary surface of semiconductor elements 10.Next, wirings 14 constituted of Cu which are to function as means forelectrical connection are connected to the electrode pads 12. Then Cuposts 16 constituting means for electrical connection are connected tothe wirings 14 and are formed to achieve a specific height. The primarysurfaces of the Cu posts 16 are then sealed with a resin layer 18. Then,solder balls 20 constituting external connection terminals are mountedat the exposed tips of the Cu posts 16.

[0021] In this embodiment, protective tape 22 is bonded to the rearsurfaces of the semiconductor elements 10. The protective tape 22, whichis constituted of a hardened synthetic resin achieving a bondingfunction such as polyimide or an epoxy resin, protects the rear surfacesof the semiconductor elements 10, which are constituted of a fragilematerial.

[0022] As explained above, since the rear surfaces of the semiconductorelements 10 are protected by bonding the protective tape 22 in theembodiment of the present invention, cracking due to any external forcethat may be applied to them or due to contact with foreign matter isprevented from occurring. In addition, since only the primary surfacesof the semiconductor elements 10 are sealed with the resin and theirrear surfaces are bonded with the protective tape 22, resin injectionmust be implemented only at one side to facilitate the filling process,and a chip-size package semiconductor device achieving a low profile isrealized.

[0023]FIG. 2 shows the semiconductor device manufacturing methodaccording to the present invention by presenting individualmanufacturing steps in sectional views.

[0024]FIG. 2(a) illustrates a step in which a wafer having a pluralityof semiconductor elements 10 formed thereon is prepared. As has alreadybeen explained, the electrode pads 12 are formed at the primary surfacesof the individual semiconductor elements 10, with the wirings 14constituted of Cu and the Cu posts 16 both to function as a means forelectrical connection connected to the electrode pads FIG. 2(b)illustrates a step in which the protective tape 22 in a size roughly thesame as the size of the wafer is bonded to the rear surface of thewafer. It is to be noted that the illustration of the electrode pads 12and the wirings 14 is omitted in FIG. 2(b) and the subsequent drawings.

[0025] The protective tape 22 may be applied through bonding onto therear surface of the wafer by adopting a method similar to that employedfor the application of regular dicing tape.

[0026]FIG. 2(c) illustrates the resin sealing step. The wafer with theprotective tape 22 applied onto the rear surface thereof is set at amold die constituted of an upper die 24 and a lower die 26. Then, aresin is injected to completely cover the Cu posts 16. Next, a heattreatment is performed to form the resin layer 18 so that the primarysurfaces of the semiconductor elements 10 become sealed with resin.

[0027] At this point, since the rear surface of the wafer (thesemiconductor elements 10) is covered by the protective tape 22, foreignmatter such as dust inside the die does not come into contact with therear surface of the wafer and also, the strength is improved. As aresult, it is possible to prevent cracks from occurring at thesemiconductor elements 10. Moreover, the wafer does not become warped asreadily as in the prior art.

[0028]FIG. 3(d) illustrates a surface polishing process in which thewafer is secured to a polishing stage 28 through vacuum holding achievedthrough the vacuum holes 30.

[0029] Since the protective tape 22 is bonded to the rear surface of thewafer in the embodiment, the warping of the wafer can be minimized,unlike in the prior art and, as a result, the wafer is secured squarelyonto the polishing stage 28. Thus, the resin layer can be polishedaccurately with a high degree of reliability by using an abrasivematerial 32 until the tips of the Cu posts 16 become exposed.

[0030] The wafer would be caused to become warped due to the differencebetween the coefficient of expansion of the wafer (the semiconductorelements 10) and the coefficient of expansion of the resin layer 18sealing the primary surface of the wafer. However, by applying theprotective tape 22 to the rear surface, a good balance is achieved withrespect to expansion and contraction occurring at the front and rear ofthe wafer in the embodiment to reduce the degree of warping. Thus, thewafer can be secured onto the polishing stage 28 with greater ease toenable surface polishing to be performed accurately with a high degreeof reliability.

[0031]FIG. 3(e) illustrates a step in which the solder balls 20constituting external connection terminals are mounted at the tips ofthe Cu posts 16 exposed at the surface of the resin layer 18.

[0032]FIG. 3(f) illustrates a step in which the wafer having undergonethe steps described above is cut along cutting lines 36 by a cuttingblade 34 to be divided into individual pieces.

[0033] While the semiconductor device in the embodiment achieves a lowerprofile, since only one surface of the semiconductor element 10 issealed with resin as explained earlier, the rear surface of the wafer ispolished to achieve an even lower profile.

[0034] During this rear surface polishing, which is implementedfollowing the surface polishing step illustrated in FIG. 3(d), theprotective tape 22 is first peeled from the rear surface of the waferthrough UV (ultraviolet ray) irradiation and then the rear surface ispolished. Since no heat treatment is performed at this point, no problemoccurs if the protective tape 22 is peeled off.

[0035] It is to be noted that while the wirings 3 and the Cu posts 16constitute means for electrical connection and the solder balls 20constitute external connection terminals in the example explained above,the present invention is not restricted to this example.

[0036] While the semiconductor device and the manufacturing methodthereof have been particularly shown and described with respect to apreferred embodiment thereof by referring to the attached drawings, thepresent invention is not limited to this example and it will beunderstood by those skilled in the art that various changes in form anddetail may be made therein without departing from the spirit, scope andteaching of the invention.

[0037] As explained above, according to the present invention, in whichthe protective tape is bonded onto the rear surface of a semiconductorelement, occurrence of cracks due to an external force or the presenceof foreign matter can be prevented, and since only the primary surfaceof the semiconductor element is sealed with resin, the process ofinjecting the resin is facilitated and a lower profile is achieved.

[0038] Furthermore, since the protective tape is bonded onto the rearsurface of the wafer before the resin sealing step, scarring of thewafer can be reduced and warping of the wafer can be prevented duringthe resin sealing step, to facilitate the surface polishing step.

[0039] The entire disclosure of Japanese Patent Application No. 11-29479filed on Feb. 8, 1999 including specification, claims, drawings andsummary is incorporated herein by reference in its entirety.

What is claimed is:
 1. A semiconductor device comprising: asemiconductor element; an electrode pad formed at a primary surface ofsaid semiconductor element; a resin layer formed at said primary surfaceat which said electrode pad is formed; a means for electrical connectionthat electrically connects said electrode pad to an external connectionterminal; and protective tape bonded onto a rear surface of saidsemiconductor element.
 2. A semiconductor device according to claim 1,wherein: said protective tape is constituted of a hardened syntheticresin achieving a bonding function.
 3. A semiconductor device accordingto claim 1, wherein: said means for electrical connection is constitutedof a wiring and a conductive post.
 4. A semiconductor device accordingto claim. 1, wherein: said external connection terminal is constitutedof a solder ball.
 5. A semiconductor device manufacturing methodcomprising: a step in which a wafer having electrode pads formed atprimary surfaces of semiconductor elements and means for electricalconnection provided at said electrode pads is prepared; a step in whichprotective tape is bonded onto a rear surface of said wafer; a step inwhich said wafer is set at a die and said primary surface of saidsemiconductor element is sealed with a resin layer; a step in which afront surface of said resin layer is polished; a step in which externalconnection terminals are mounted to said means for electrical connectionexposed at said front surface of said resin layer; and a step in whichsaid wafer having undergone the preceding steps is divided intoindividual pieces.
 6. A semiconductor device manufacturing methodaccording to claim 5, further comprising: a step in which saidprotective tape is peeled off and said rear surface of said wafer ispolished, that is implemented after said step in which said frontsurface of said resin layer is polished.
 7. A semiconductor devicemanufacturing method according to claim 5, wherein: said protective tapeis peeled off through ultraviolet ray irradiation.
 8. A semiconductordevice manufacturing method according to claim 5, wherein: said step inwhich said rear surface of said wafer is polished is implemented beforea heat treatment.
 9. A semiconductor device manufacturing methodaccording to claim 5, wherein: said protective tape is constituted of ahardened synthetic resin achieving a bonding function.
 10. Asemiconductor device manufacturing method according to claim 5, wherein:said means for electrical connection is constituted of a wiring andconductive posts.
 11. A semiconductor device manufacturing methodaccording to claim 5, wherein: said external connection terminals areconstituted of solder balls.